Stochastic Processors: Design, Analysis and Challenges

Date and Time:

January 28, 2011 - 3:00pm - 3:20pm

Presentation Abstract:

Traditional architecture design approaches hide hardware uncertainties from the software stack through overdesign, which is often expensive in terms of power consumption. The recently proposed quantitative alternative of stochastic computing requires circuits and processors to be correct only probabilistically and use less power. This talk is about developing a theory of stochastic computing. This involves a formal model for a device which computes a deterministic function with stochastic delays. Semantics of a stochastic device and a quantitative notation of stochastic correctness (Correctness Factor) and techniques for calculating Correctness Factors for several circuits are also presented.