"Low power design in deep sub-micron System-on-chip electronic devices"

Mobile portable devices will continue to drive growth in the electronics industry. The mobile internet promises to be 10-100x larger in unit volume than the desktop internet ever was. Battery technology has been scaling at about 2x every 10 years compared to semiconductor technology, which scales 2x every 18 months. The gap between what portable electronic devices demand and what batteries can deliver will continue to grow. Low power electronics design solutions, low power technologies and advance power management techniques are required to close the gap.  Semiconductor industry has coped with the issue through a combination of techniques such as logic power gating, clock gating, channel length reduction, logic retention, process/temperature AVS, dynamic voltage and frequency scaling (DVFS) and adaptive body bias (ABB).  Low power design will drive a major R&D effort in the next decade.  This presentation will emphasize the issue and present current and upcoming solutions.